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1 HwA1: REDUCED MEMORY LATENCY FOR REGULAR DATA ACCESS Mateo Valero, Tom s Lang*, Montse Peiron, Eduard Ayguad , J.M. Llaberia and J.J. Navarro Departament d Arquitectura de Computadors, Universitat Polit cnica de Catalunya c/ Gran Capit s/n, M dul D6, 08034 - Barcelona, SPAIN * Department of Electrical
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Contents 1. Introduction, 2 2. Perturbation Theory, 3 3. Controlled Performance Experimentation, 6 3.1 Perturbation Analysis for Performance Space Probing, 7 3.1.1 Benchmarking, 9 3.1.2 Performance Characterization, 11 3.2 Perturbation Analysis for Performance Quantification, 13 3.3 Comments, 16 4.
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1 HwA2: SPECIAL MEMORY INTERLEAVING SCHEMES Montse Peiron, Mateo Valero, Eduard Ayguad and Tom s Lang* Departament d Arquitectura de Computadors, Universitat Polit cnica de Catalunya Gran Capit s/n, M dul D4, 08034 - Barcelona (Spain) *Department of Electrical and Computer Engineering, University of
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PaA2 Deliverable APPARC ESPRIT Contract A Strassen-Type Matrix Inversion Algorithm DRAFT Susanne M. Balle Per Christian Hansen UNIfflC Danish Computing Center for Research and Education Building 305, Technical University of Denmark DK-2800 Lyngby, Denmark Susanne.M.Balle@uni-c.dk
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Deliverable for ESPRIT BRA APPARC Algorithms for Data Locality Optimization F. Bodin, C. Eisenbeis, W. Jalby, T. Montaut, P. Rabain, D. Windheiser, Contents 1 Introduction 2 2 Data Locality Notion 4 2.1 Spatial Data Locality : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 4 2.2 Temporal
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O b j e c t O r i e n t e d K n o w l e d g e F r a m e w o r k s a n d M a c h i n e I n d e p e n d e n t E n v i r o n m e n t s T . S . P a p a t h e o d o r o u G . E . K a l a m a r a s K . N . P a n t a z o p o u l o s E . D . P o l y c h r o n o p o u l o s J u l y 3 1 , 1 9 9 3 A b s t r a c t
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STRUCTURAL ANALYSIS PROBLEM WITH DIRECT SOLVER F-X. ROUX
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An efficient technique for solving the enumeration problem in high performance optimization algorithms C. Eisenbeis, O. Temam, H. Wijshoff INRIA, IRISA, University of Leiden 1 Contents 1 Introduction 1 2 Applications 2 2.1 Improving integer programming analysis techniques : : : : : : : : : : : : : : : :
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Cache Performance Analysis Olivier Temam, Christine Fricker, Elena Granston, William Jalby University of Leiden, INRIA, University of Leiden, IRISA Table of Contents 1 Introduction 9 1.1 Caches : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 9 1.2 Cache
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OPS2 deliverable APPARC ESPRIT Contract Evaluation of numerical applications running with shared virtual memory Rudolf Berrendorf Michael Gerndt Zentralinstitut f ur Angewandte Mathematik Forschungszentrum J ulich D-52425 J ulich Germany r.berrendorf@kfa-juelich.de m.gerndt@kfa-juelich.de Zakaria
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How to GRASP GOOD Marc Andries Rudolf Freund Brigitte Haberstroh Leiden University Technical University of Vienna Technical University of Vienna Dept. of Comp. Science Inst. for Computer Languages Inst. for Information Systems Niels Bohrweg 1 Resselgasse 3 Paniglgasse 16 2333 CA Leiden A-1040 Vienna
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Compilation Techniques for Sparse Matrix Computations Aart J.C. Bik and Harry A.G. Wijshoff High Performance Computing Division Department of Computer Science Leiden University P.O. Box 9512, 2300 RA Leiden ajcbik@cs.leidenuniv.nl and harryw@cs.leidenuniv.nl
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References S. Kamal Abdali and David S. Wise. Experiments with quadtree representation of matrices. In G. Goos and J. Hartmanis, editors, Lecture Notes in Computer Science 358, pages 9608. Springer-Verlag, 1988. U. Banerjee. Loop Transformations for Restructuring Compilers: The Foundations.
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Deciding the NTS Property of Context-Free Grammars Joost Engelfriet Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands
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On Improving Data Locality in Sparse Matrix Computations Peter M.W. Knijnenburg Harry A.G. Wijshoff High Performance Computing Division, Dept. of Computer Science, Leiden University, P.O. Box 9512, 2300 RA Leiden, the Netherlands peterk@cs.leidenuniv.nl and harryw@cs.leidenuniv.nl
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An Event Structure Semantics for General Petri Nets P.W. Hoogers y H.C.M. Kleijn y P.S. Thiagarajan z November 1993
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Enhancing the Quality of Conceptual Database Specifications through Validation Andreas Zamperoni Perdita Lohr-Richter Leiden University Technical University Braunschweig Dept. of Computer Science Dept. of Computer Science Niels Bohrweg 2, NL-2333 CA Leiden Gaussstr. 12, D-3300 Braunschweig The
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A Hybrid Query Language for the Extended Entity-Relationship model Marc Andries Gregor Engels Leiden University, Dept. of Comp. Science Niels Bohrweg 1, 2333 CA Leiden, The Netherlands E-mail: fandries,engelsg@wi.leidenuniv.nl
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On the use of Graph Grammars for defining the Syntax of Graphical Languages J. Rekers Department of Computer Science, Leiden University Niels Bohrweg 1, 2333 CA Leiden, The Netherlands email: rekers@wi.leidenuniv.nl
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Graph Grammars and Tree Transducers Joost Engelfriet Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands
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Biological metaphors and the design of modular artificial neural networks Master's thesis of Egbert J.W. Boers and Herman Kuiper Departments of Computer Science and Experimental and Theoretical Psychology at Leiden University, the Netherlands Preface This thesis is the result of a research done at the
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Separation of Correctness and Complexity in Algorithm Design Michel Chaudron, chaudron@cs.leidenuniv.nl Department of Computing Science Leiden University P.O. Box 9512, 2300 RA Leiden 11 May 1994 1 Introduction In this paper we propose a new approach to the design of algorithms. This approach is based
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BIRRER : HUMAN SCIENCE IN A POLITICAL WORLD 1 HUMAN SCIENCE IN A POLITICAL WORLD : THE IMPORTANCE OF CHECKS AND BALANCES paper presented at the 12th International Human Science Research Conference ( Human sciences at the intersection of politics, social change & development, and political decision
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1 RISK : PROBLEMS AND PERSPECTIVES Frans A.J. Birrer Mathematics, Computer Science & Society Chemistry & Society P.O. Box 9512 P.O. Box 9502 2300 RA Leiden 2300 RA Leiden Netherlands Netherlands fax 71 - 275819 INTRODUCTION Let us start from the following rather broad, and somewhat naive definition of
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Classifier Systems A useful approach to machine learning byBart de BoerLeiden UniversityAugust 31, 1994Master's Thesis Preface This thesis was written as a final project in artificial intelligence research for the subject of applied computer science at the university of Leiden (Rijksuniversiteit
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Integrating the Developers' and the Management's Perspective of an Incremental Development Life Cycle Andreas Zamperoni Bart Gerritsen Leiden University TNO Institute of Applied Geoscience Dept. of Computer Science Information Systems Oil&Gas P.O. Box 9512, 2300 RA Leiden P.O. Box 6012, 2600 JA Delft
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A LOTOS specification of a CSCW tool J. Rekers I. Sprinkhuizen-Kuyper Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands Email: rekers@rulwi.leidenuniv.nl, phone: +31 71 277092, fax: +31 71 276985
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Drie Varianten van het A -Algoritme door Rudy van Vliet (Wiskunde & Informatica, 1987) Mei 1994 In het kader van een Projectstudie Kunstmatige Intelligentie Docent: dr. I.G. Sprinkhuizen-Kuyper Rijksuniversiteit te Leiden Inhoudsopgave Voorwoord II 1 Inleiding 1 1.1 Zoeken in een Toestandsruimte : : : :
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111 Figure F.4: horizontal color slice and contour slice of the pressure together with the map of the HIRLAM domain Figure F.5: iso surface of the wind at 40 knots together with the orography of the HIRLAM domain 110 APPENDIX F. EXAMPLE IMAGES Figure F.2: contour surface of a 2-D field (without handle)
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1 For a comprehensive work, see . 2 What there is to say about controversies, has been said. A few years ago, controversy studies, both in science and in society, were sought as a research site to show that there are always conflicting explanations, methods and options. That s no
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93 24 September 1993 RIJKSUNIVERSITEIT TE LEIDEN VAKGROEP INFORMATICA Designing Modular Artificial Neural Networks Egbert J.W. Boers Herman Kuiper Bart L.M. Happel Ida G. Sprinkhuizen-Kuyper Department of Computer Science Leiden University Niels Bohrweg 1 P.O. Box 9512 2300 RA Leiden The Netherlands 1
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Integration of the Different Elements of Object-Oriented Software Engineering into a Conceptual Framework: The 3D-Model Andreas Zamperoni Leiden University Dept. of Computer Science Niels Bohrweg 2 NL-2333 CA Leiden Tel.: ++31 - 71 - 27 7103 Fax.: ++31 - 71 - 27 6985 email: zamper@wi.leidenuniv.nl May
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MSO Definable Text Languages Hendrik Jan Hoogeboom and Paulien ten Pas Leiden University, Department of Computer Science P.O.Box 9512, 2300 RA Leiden, The Netherlands fhjh,pasg@rulwinw.leidenuniv.nl
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(3) Parallel loops (y/n): If yes - how would the data dependencies within loops be categorised (high, medium, low, none): - which synchronisation mechanisms are used Barrier (high, medium, low, none): Post/Wait (Random) (high, medium, low, none): Lock/Unlock (Mutual Exclusion) (high, medium, low, none):
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Validating Database Components of Software Systems Perdita Lohr-Richter Andreas Zamperoni Technical University of Braunschweig Leiden University Dept. of Computer Science Dept. of Computer Science Gaussstr. 12, D-3300 Braunschweig Niels Bohrweg 2, NL-2333 CA Leiden Germany The Netherlands Tel.:
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COMPLEX INTERTWINEMENTS IN ARGUMENTATION : SOME CASES FROM DISCUSSIONS ON BIOTECHNOLOGY AND THEIR IMPLICATIONS FOR ARGUMENTATION STUDIES paper presented at the Third International Conference on Argumentation, June 21-24, 1994, Amsterdam FRANS A.J. BIRRER ROB PRANGER Mathematics, Computer Science &
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REALITY CONSTRUCTION AS PROBLEM ORIENTED DECOMPOSITION : BETWEEN (SOCIAL) CONSTRUCTIVISM AND REALISM paper presented at the conference 'Explorations in constructive realism', 29-30 June, 1993, Amsterdam revision August 1994 Frans A.J. Birrer Mathematics, Computer Science & Society Chemistry & Society
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U. Banerjee. Unimodular transformations of double loops. In Proceedings of Third Workshop on Languages and Compilers for Parallel Computing, 1990. U. Banerjee. Loop Transformations for Restructuring Compilers: The Foundations. Kluwer Academic Publishers, Boston, 1993. Aart J.C. Bik and Harry
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Voorwoord Ter afsluiting van mijn studie Informatica aan de Rijksuniversiteit Leiden, heb ik gekozen voor een afstudeerproject op het gebied van de Theoretische informatica, een specialisatie van de afstudeerrichting Fundamentele informatica. De inhoud van dit project is de trace-theorie; een theorie
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operations on JPEG images E.F. de Vries G.P. Kumara September 20, 1994 Contents 1 Introduction 5 1.1 The operations : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 5 1.2 Terminology & notation : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : :
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A Multiset Semantics for the pi-Calculus with Replication Joost Engelfriet Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands
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DOALL-loops on so-called wavefronts, corresponding to the sequence of DOALL-loops found in this section. Repeated startup overhead is eliminated, if each processor fetches iterations of IL if available, and executes a barrier statement before shifting to IL+1. 5 Summary In this paper, we have explored
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Internal Report 94-23 | September 1994 Integrating Method Objects into the Object-Oriented Life Cycle Approach Th. van Elzakker Master's Thesis Leiden University, the Netherlands Faculty of Mathematics and Natural Sciences Department of Computer Science Software Engineering group Braunschweig Technical
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On Automatic Data Structure Selection and Code Generation for Sparse Computations Aart J.C. Bik and Harry A.G. Wijshoff High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, the Netherlands ajcbik@cs.leidenuniv.nl and harryw@cs.leidenuniv.nl
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APPARC Deliverable PME3 Cache Interference Phenomena O. Temam C. Fricker W. Jalby University of Leiden INRIA University of Versailles 2333 CA Leiden 78153 Le Chesnay Cedex 78 Versailles The Netherlands France France
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Deliverable HwA4: Memory Organization and Management for Linear Algebra Computations UPC: Juan J. Navarro Tomas Lang Toni Juan Javier Gallardo Elena Garcia Leiden: Olivier Temam IRISA: C. Fricker Y. Jegou W. Jalby Manchester: Dave Snelling
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APPARC PaA3a Deliverable ESPRIT BRA III Contract # 6634 Reordering of Sparse Matrices for Parallel Processing Achim Basermannn Peter Weidner Zentralinstitut f ur Angewandte Mathematik KFA J ulich GmbH D-52425 J ulich, Germany A.Basermann@kfa-juelich.de P.Weidner@kfa-juelich.de Per Christian Hansen
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Part II Cache Awareness in Blocking Techniques 78 O. Temam C. Fricker W. Jalby
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Deliverable HwA3: In Memory Computation Manchester: Dr. David F. Snelling (snelling@cs.man.ac.uk) Leiden: Arnold Niessen (niessen@cs.leidenuniv.nl) IRISA: William Jalby (jalby@irisa.fr) UPC: Mateo Valero (mateo@ac.upc.es) Contents 1 Executive Summary 2 1.1 Description from Technical Annex : : : : : : :
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PERROTT, R. H., AND ZAREA-ALIABADI, A. 1993. Review of Existing Language Proposals for Programming Distributed Memory MIMD Systems. APPARC Deliverable HLL1. PERROTT, R. H., AND ZAREA-ALIABADI, A. 1994. Identification of Abstractions. APPARC Deliverable HLL3. VEREECKEN, H., LINDENMAYER, G., KUHR, A.,
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PART I: Domain Decomposition Methods and Distributed Memory Machines PART II: An Implementation of a Distributed Memory Direct Sparse Unsymmetric Linear System Solver
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PCA3a deliverable APPARC ESPRIT Contract Particle methods for Boltzmann equations with virtual shared memory Philippe d'Anfray Fran cois Rogier ONERA DMI Parallel Computing BP72 92322 Chatillon Cedex France anfray@onera.fr rogier@onera.fr Thierry Priol IRISA-INRIA Campus de Beaulieu 35042 Rennes Cedex
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Apparc Project Report, Deliverable PSE4: Intermediate Language / Compiler T.S. Papatheodorou July 1994
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APPARC PaA3b Deliverable ESPRIT BRA III Contract # 6634 Optimized Kernels for the Solution of Partial Differential Equations on Distributed Memory Machines Achim Basermannn Christof Schelthoff Peter Weidner Zentralinstitut f ur Angewandte Mathematik KFA J ulich GmbH D-52425 J ulich, Germany
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Preface In this document, an overview is given of the work that has been done in the area of automatic conversions of dense programs into sparse code at the Leiden University in the Netherlands. Because this document consists of a collection of published papers, technical reports and papers that have
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APPARC Deliverable PME4b Performance Analysis of Multiprocessors Memory System O. Temam University of Versailles 45 Av. des Etats-Unis 78000 Versailles France
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THE APPARC TEST MATRICES E. BRIERE DE L'ISLE, P. LECA and P. WEIDNER y
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Deliverable PME4a: Architectural Simulation Manchester: David F. Snelling (d.snelling@cs.man.ac.uk) Steve Hooton (hootons@cs.man.ac.uk) John Gurd (j.gurd@cs.man.ac.uk) Introduction As the complexity of computer systems has increased, it has become necessary to use simulation to predict their detailed
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Effect of short term scheduling on message passing multiprogrammed systems Sergi Girona Toni Cortes Jes us Labarta Vincent Pillet Andr es P erez Eva L opez August 16, 1994 Contents 1 Introduction 5 1.1 Objective and approach : : : : : : : : : : : : : : : : : : : : : : : : : : : : 7 2 Paros prototype and
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OpS4b deliverable APPARC ESPRIT Contract Performance Analysis Tools For SVM Architectures Rudolf Berrendorf Michael Gerndt Zentralinstitut f ur Angewandte Mathematik Forschungszentrum J ulich D-52425 J ulich Germany r.berrendorf@kfa-juelich.de m.gerndt@kfa-juelich.de Thierry Priol IRISA-INRIA Campus de
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Part IV Removing Interference Misses using Cache Bypass Buffers 118 Toni Juan Juan J. Navarro Tomas Lang
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DOMAIN DECOMPOSITION METHODS AND DISTRIBUTED MEMORY MACHINES F-X. ROUX
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Part III Using Virtual Lines to Enhance Locality Exploitation 98 O. Temam Y. Jegou
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A Massively Parallel Implementation of a Numerical Weather Forecast Model L. Wolters, G. Cats, and N. Gustafsson Contents 1 Introduction 1 2 Basic model equations 3 3 HIRLAM 4 4 Numerical algorithms 5 5 The parallel architecture 10 6 Implementation issues 12 7 Realized performance 20 7.1 Gridpoint Model
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CoD3 OPTIMIZING LOCALITY OF PROGRAMS APPARC DELIVERABLE (DRAFT) F. Bodin, W. Jalby, A. Seznec University of Rennes M. O'Boyle, G. Hedayat University of Manchester Contents 1 Introduction 2 2 Compiler Infrastructure 2 2.1 Using Sage++ : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : :
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KSR. 1991. KSR Fortran Programming, Vol.1 & 2. Kendall Square Research Corp., Waltham, MA. LI, K., AND SCHAEFER, R. 1989. A Hypercube Shared Virtual Memory System. Proceedings International Conference on Parallel Processing, pp 125-132 METCALF, M., AND REID, J. 1990. Fortran 90 Explained. Oxford Science
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CEC-DGXIII APPARC Newsletter Number 3, May 1993 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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CEC-DGXIII APPARC Newsletter Number 6, June 1994 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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CEC-DGXIII APPARC Newsletter Number 5, February 1994 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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CEC-DGXIII APPARC Newsletter Number 1, October 1992 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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CEC-DGXIII APPARC Newsletter Number 2, January 1993 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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CEC-DGXIII APPARC Newsletter Number 4, October 1993 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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Algebraic and Syntactic Methods in Computer Science Publications relevant to ASMICS2 20 October 1994 Hamburg, Universit at Publications of Theory Working Group Hamburg related to ASMICS. D.Hauschildt: Semilinearity of the reachability set is decidable for Petri nets, Doctoral Thesis, Dept. of Computer
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Chapter Introduction In 1962 C.A. Petri presented the foundations for a new theory for describing information flows . These foundations were based on both theoretical and practical considerations. In contrast to the classical automata theory, where the states are global and a transition leads
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EC-DGIII APPARC Newsletter Number 7, October 1994 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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the decidability of the boundedness of functions on hypergraph generating regular tree grammars masters thesis wilbert schelvis august 1994 rijksuniversiteit leiden i Preface This thesis was written as part of the final assignment for my study at the university of Leiden. I started this study in October
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Artificial Autonomous Agents and Learning Systems Bart de Boer Free University of Brussels (Belgium) Leiden University (the Netherlands) November 8, 1994 Preface These are the texts of two lectures delivered on the summer school for advanced information processing in Varna, Bulgaria, which was held from
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Algebraic and Syntactic Methods in Computer Science Publications relevant to ASMICS2 11 November 1994 Lille, Laboratoire d'Informatique Fondamentale de Lille Publications of Lille related to ASMICS M.Clerbout, D.Gonzalez: Atomic Semi-commutations, Theoretical Computer Science 123 (1994) 259-272 We
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A Formal Verification of the Alternating Bit Protocol in CRL Gertjan Kamsteeg Department of Computer Science Leiden University
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Preface This paper was written as the result of a research project conducted for the artificial intelligence laboratory of the free university of Brussels. The research project was made possible through an Erasmus exchange between Leiden University and the Free University of Brussels. The project took
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1 A Comment on a Paper of Blum: Blum s local minima are saddle points I.G. Sprinkhuizen-Kuyper and E.J.W. Boers Department of Computer Science Leiden University email: {kuyper,boers}@wi.leidenuniv.nl
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A C++ Implementation of a Parser for Visual Languages based on Relational Grammars A.E. Paalder January 17, 1995 Contents 1 Introduction 2 2 Visual Syntax Specification 7 2.1 The Formalism : : : : : : : : : : : : : : : : : : : : : : : : : : : : 8 2.2 The production-rules : : : : : : : : : : : : : : : :
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ARL and PR2, reversible languages Jurriaan Hage 1993-1994
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Text Languages in an Algebraic Framework Hendrik Jan HOOGEBOOM Paulien ten PAS Department of Computer Science, Leiden University, P.O.Box 9512, 2300 RA Leiden, The Netherlands hjh@rulwinw.leidenuniv.nl, pas@rulwinw.leidenuniv.nl
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A Parsing Algorithm for Context-Sensitive Graph Grammars J. Rekers Department of Computer Science, Leiden University Niels Bohrweg 1, 2333 CA Leiden, The Netherlands email: rekers@wi.leidenuniv.nl A. Schurry Lehrstuhl fur Informatik III, RWTH Aachen Ahornstr. 55, D-52074 Aachen, Germany e-mail:
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Visual Specification of Complex Database Actions Gregor Engels Leiden University, Dept. of Computer Science P.O. Box 9512, NL-2300 RA Leiden The Netherlands engels@wi.leidenuniv.nl Perdita Lohr Quantum GmbH Emil-Figge-Strasse 83, D-44227 Dortmund Germany loehr@quantum.de
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Observable or Invocable Behaviour - You Have to Choose! Jurgen Ebert Gregor Engels Koblenz University Leiden University Dept. of Computer Science Dept. of Computer Science Rheinau 1 P.O. Box 9512 D-56075 Koblenz NL-2300 Leiden phone: ++49-261-9119-412 phone: ++31-71-27-7096 fax: ++49-261-9119-499 fax:
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Master's Thesis Graphical Scanning of Diagrams A Spatial Relations Analyzer Leiden University, Department of Computer Science Vincent J. Bierman Advisor : Dr. J. Rekers Contents 1 Introduction 3 2 Related Work 9 3 Detailed Design 13 3.1 Identifying Objects : : : : : : : : : : : : : : : : : : : : : : : :
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A Hybrid Query Language for an Extended Entity-Relationship Model (revised version of TR 93-15) Marc Andries Gregor Engels Leiden University, Dept. of Comp. Science Niels Bohrweg 1, 2333 CA Leiden, The Netherlands E-mail: fandries,engelsg@wi.leidenuniv.nl
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Implementation of Fourier-Motzkin Elimination Aart J.C. Bik and Harry A.G. Wijshoff High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, the Netherlands ajcbik@cs.leidenuniv.nl
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The Cache Visualisation Tool Eric van der Deijl Gerco Kanbier Januari 1995 Contents 1 Introduction 5 2 Cache Theory 7 2.1 Introduction to caches : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 7 2.2 Set Associativity : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 8
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Data-parallel numerical methods in a weather forecast model Lex Wolters y High Performance Computing Division, Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands llexx@cs.leidenuniv.nl Gerard Catsy Royal Netherlands Meteorological Institute P.O. Box 201,
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Data-Parallel Numerical Weather Forecasting Lex Wolters High Performance Computing Division, Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands llexx@cs.leidenuniv.nl Gerard Cats Royal Netherlands Meteorological Institute P.O. Box 201, 3730 AE De Bilt, The
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A DATA PARALLEL HIRLAM FORECAST MODEL Lex Wolters y, Robert van Engelenz High Performance Computing Division, Dept. of Computer Science, Leiden University P.O. Box 9512 2300 RA Leiden, The Netherlands fllexx,robertg@cs.leidenuniv.nl Gerard Catsy Royal Netherlands Meteorological Institute P.O. Box 201
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References G.J. Haltiner and R.T. Williams, Numerical Prediction and Dynamic Meteorology, second edition, John Wiley & Sons, New York, 1980. P. K allberg (editor), Documentation Manual of the Hirlam Level 1 Analysis-Forecast System, June 1990. MasPar, MasPar MP-1 Hardware Manuals, July 1992.
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Finite Difference and Spectral Models for Numerical Weather Forecasting on a Massively Parallel Computer. Gerard Cats Royal Netherlands Meteorological Institute P.O. Box 201, 3730 AE De Bilt, The Netherlands cats@knmi.nl Nils Gustafsson Swedish Meteorological and Hydrological Institute S-60176
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Atmosphere and Ocean Circulation Simulation on Massively Parallel Computers Lex Wolters High Performance Computing Division, Department of Computer Science, Leiden University, P.O. Box 9512, 2300 RA Leiden, The Netherlands
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A PARALLEL IMPLEMENTATION OF THE HIRLAM MODEL Lex Wolters High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands Gerard Cats Royal Netherlands Meteorological Institute P.O. Box 201, 3730 AE De Bilt, The Netherlands
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On Reducing Overhead in Loops Peter M.W. Knijnenburg Aart J.C. Bik High Performance Computing Division, Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands. E-mail: peterk@cs.leidenuniv.nl and ajcbik@cs.leidenuniv.nl
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Multisets and Structural Congruence of the pi-Calculus with Replication Joost Engelfriet and Tjalling Gelsema Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands
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Memory Hardware Support for Sparse Computations Arnold J. Niessen Harry A.G. Wijshoff High Performance Computing Division, Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands +31 71 277037, fax: +31 71 276985 niessen@cs.leidenuniv.nl This work was supported
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Address Reference Generation in a Memory Hierarchy Simulator Environment Arnold J. Niessen Harry A. G. Wijshoff High Performance Computing Division, Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands niessen@cs.leidenuniv.nl This work was supported in part
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EC-DGIII APPARC Newsletter Number 8, April 1995 A publication of the APPARC Consortium: UNIfflC, ONERA, KFA, Leiden University, Queen's University Belfast, University of Patras, IRISA, University of Manchester, Polytechnic University of Catalonia. Editors: Lex Wolters and Harry Wijshoff; High
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Project Study Neural Networks On the dynamic behaviour of back propagation networks October 28, 1994 By Alex Wulms St. Nr. 8949670 1. Introduction page 1 1. Introduction As neural networks are often used to solve problems which are not completely understood or which are hard to solve with the more
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Adaptive software process modelling with SOCCA and PARADIGM page 1 Adaptive software process modelling with SOCCA and PARADIGM by Alex Wulms University of Leiden, Department of computer science April 12, 1995 Supervision by Dr. L.P.J. Groenewegen Adaptive software process modelling with SOCCA and
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1 Evolving Artificial Neural Networks using the Baldwin Effect E.J.W. Boers, M.V. Borst and I.G. Sprinkhuizen-Kuyper
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Schedules for Multiset Transformer Programs May 19, 1995 19 Acknowledgdements I would like to thank Edwin de Jong for many discussions and detailed comments on earlier drafts of this report. Part of the research presented here was done during a stay at the Theory and Formal Methods section of Imperial
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1
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Trees and Texts Omslag Tekening: `Winterswijkse wilg' van Agatha Koers Ontwerp: C edilles, Amsterdam Trees and Texts Proefschrift ter verkrijging van de graad van Doctor aan de Rijksuniversiteit te Leiden, op gezag van de Rector Magnificus Dr. L. Leertouwer, hoogleraar in de faculteit der
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TEMPO and SOCCA Concepts, modelling and comparison by Richard Willemsen 01-05-1995 Department of Computer Science University of Leiden
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The Shape of the Error Surfaces of some simple Neural Networks1 Ida G. Sprinkhuizen-Kuyper Egbert J.W. Boers Department of Computer Science Department of Computer Science Leiden University Leiden University P.O. Box 9512 P.O. Box 9512 2300 RA Leiden 2300 RA Leiden kuyper@wi.leidenuniv.nl
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Forward Modelling of Resistivity Logs using Neural Networks P. Demmenie August 31, 1995
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Reflections on Functional Modelling in SOCCA Maarten Steenhuis student number 8839670 Leiden University, Department of Computer Science Niels Bohrweg 1 2333 CA Leiden, The Netherlands August, 1995 Functional Modelling in SOCCA 2 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . .
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20 August 1995; 19:29 1 Master04.Doc 1 Introduction This master thesis concludes the study of computer science at the Rijks Universiteit of Leiden. The mentor for this project is dr. L.P.J. Groenewegen. The topic addressed in this master thesis is the investigation of how to combine the ISO-9000 quality
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Evolutionary Software Development: An Experience Report on Technical and Strategic Requirements Andreas Zamperoni Bart Gerritsen Bert Bril Leiden University TNO Institute of Applied Geoscience Dept. of Computer Science Information Systems Oil&Gas P.O. Box 9512, 2300 RA Leiden P.O. Box 6012, 2600 JA
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GRIDS - GRaph-based, Integrated Development of Software: Integrating Different Perspectives of Software Engineering Andreas Zamperoni Leiden University Dept. of Computer Science P.O. Box 9512, 2300 RA Leiden, The Netherlands email: zamper@wi.leidenuniv.nl www: http://www.wi.leidenuniv.nl/
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Ctadel: A Generator of Efficient Code for PDE-based Scientific Applications Robert van Engelen y & Lex Wolters y High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands frobert,llexxg@cs.LeidenUniv.nl Gerard Cats Royal
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-0- Technical Report 95 21 July 1995 Rijksuniversiteit te Leiden Rijksuniversiteit te Leiden Vakgroep Informatica Encapsulated Hierarchical Graphs, Graph Types, and Meta Types G. Engels A. Sch rr Department of Computer Science Leiden University P.O. Box 9512 2300 RA Leiden The Netherlands -1-
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1 CALM, a Different Approach Evolution in and Experimenting with CALM Architectures Roberto Lambooy August 1995 Master's thesis Leiden University The Netherlands
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1 Parallel Genetic Algorithms Master s Thesis Laurens Jan Pit 30/08/95 Department of Computer Science Leiden University 2 3 Preface Can. Leiden, 30/08/95 Laurens Jan Pit 4 5
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Inhoudsopgave Inleiding 1 Samenvatting 2 1 Wat is een genetisch algoritme 3 1.1 Inleiding : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 3 1.2 Genetische operatoren : : : : : : : : : : : : : : : : : : : : : : : : 4 1.2.1 Selectie : : : : : : : : : : : : : : : : : : : : : : : : : : : : 4
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Technical Report 95-30 October 1995 Rijksuniversiteit te Leiden Vakgroep Informatica Using L-Systems as Graph Grammar: G2L-Systems Egbert J.W. Boers Department of Computer Science Leiden University P.O. Box 9512 2300 RA Leiden The Netherlands GAiN SEIS 1 1 Introduction The development of plants and
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Appeared in: Proceedings of the 3rd Conference on Parallel Problem Solving from Nature, LNCS 866, Springer-Verlag, 1994, pp.78-87 Genetic algorithms with multi-parent recombination A.E. Eiben, P-E. Rau , Zs. Ruttkay Artificial Intelligence Group Dept. of Mathematics and Computer Science Vrije
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1 Adaptive Resonance Theory (ART): An Introduction by L.G. Heins & D.R. Tauritz May/June 1995 ART-1 network produced by SNNS v3.3 - 9 input nodes, 9 output nodes 2 Index Paragraph 1 - Introduction......................................................................................3 Paragraph 2 -
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Orgy in the Computer: Multi-Parent Reproduction in Genetic Algorithms A.E. Eiben1 C.H.M. van Kemenade2 J.N. Kok1 gusz@cs.ruu.nl kemenade@cwi.nl joost@cs.ruu.nl 1 Department of Computer Science Utrecht University P.O. Box 80089, 3508 TB Utrecht, The Netherlands 2 Department of Software Technology CWI,
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Raising GA Performance by Simultaneous Tuning of Selective Pressure and Recombination Disruptiveness C.H.M. van Kemenade CWI, Dept. of Software Technology P.O. Box 94079, 1090 GB Amsterdam, The Netherlands kemenade@cwi.nl J.N. Kok A.E. Eiben Leiden University, Dept. of Computer Science P.O. Box 9512,
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(a) (b) Figure 11: Influence of mapping function. (a) After 4 iterations of i; (b) Misses-per-array-reference statistics. Figure 12: Cache miss distribution for compress. 18
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The first option is rather complicated because we will need two separate simulations; one simulation of the first level, the direct-mapped cache, and one simulation of the second level, the fully associative cache. This second level needs a small modification of the CVT; Besides the result whether it is
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Figure 4.6: Screen-shot of the CVT after completing the FLO52 loop (a) Miss statistics (b) Reference statistics Figure 4.7: Miss and reference statistics for first part of Array X 4.3 Blocking Blocking, also called tiling, is one of the most well-known optimization techniques for reducing capacity
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X 1,300;1,300 Y 90000 1,300;1,300 Z 180000 1,300;1,300 DO kk = 1,300,30 DO jj = 1,300,30 DO i = 1,300,1 DO k = kk,min(kk+29,300),1 R X 1*k,1*i DO j = jj,min(jj+29,300),1 R Z 1*j,1*i R Y 1*j,1*k W Z 1*j,1*i ENDDO ENDDO ENDDO ENDDO ENDDO Figure 3.49: The CVT code that performs matrix-matrix multiply, for
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ILU preconditioning with a fill drop strategy based on strongly connected components Arno C. N. van Duin and Harry A. G. Wijshoff September 12, 1995
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Alvin R. Lebeck and David A. Wood. Cache Profiling and the SPEC Benchmarks: A Case Study. IEEE Computer, vol. 27, no. 10, Oct. 1994, pp. 15-26. Kathryn S. McKinley. Automatic and Interactive Parallelization. PhD thesis, Rice University, Technical Report CRPC-TR92214, April 1992. R.A.Sugumar
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Consider hardware optimizations. The development of a novel cache design is often based on the intuition that, in some situations, this new design will perform better than a standard cache. Suppose, for instance, you come up with the intuition that a hashing function could enhance a direct-mapped cache
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TagsDataTagIndexBlockoffset44Set 0Set 1Set 2Set 3 Figure 2.3: Cache line identification. 2.4 Replacement policies The large number of entries of the main memory and the smaller number in cache, make that some entries in main memory map to the same cache line in cache. This implies that on a miss, there
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To change a certain color of a combination of (Statement ID, Array Reference ID), press the middle mouse button on that combination and the same window as described in section 3.6.1 will pop up and gives the opportunity to change the color to any of the ten colors provided. To update the contents of the
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Figure 3.6: Input array specification ffl Top-16 Statistics The sixteen array entries with the most number of misses (in 'Amount mode) or the highest miss ratio (in 'Percentage mode) are shown. Please note that the percentage modes for array statistics are not yet implemented. Trace statistics These
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In total the CVT source code is 905337 bytes or 25294 lines large. The CVT executable (cache) is 561440 bytes. The graphical interface in which the CVT is programmed is Motif, it is a shell over X-windows and is available for most Work Stations. Motif is an event-based windowing system, which induced
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to the array or the reference which last used it. The main window is equipped with a command panel to control the execution. Simultaneously, a statistics window displays various statistics in real-time on the cache, the arrays, the array references or the program counters. The CVT can be fed with loop
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Figure 1: Main window (cache content and control panel). 12
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(a) Miss statistics (b) Reference statistics Figure 4.23: Total miss and reference statistics after software prefetched matrix matrix multiply. instruction as either normal (the value of this field is 0), or as the prefetch instruction (value of the field is 1), the other two extra entries are not used.
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Figure 3.35: The Add Program Counter Breakpoint window. The last option concerning breakpoints is the one that shows the lists of breakpoints defined by the user on screen. Since there are program specific and trace specific breakpoints, there are two different windows that are popped up. In figure 3.36
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APPARC PaA5b Deliverable ESPRIT BRA III Contract # 6634 Improving the Numerical Stability and the Performance of a Parallel Sparse Solver Arno C. N. van Duin Harry A. G. Wijshoff Leiden University, P.O.Box 9512, 2300 RA Leiden, The Netherlands arno@cs.leidenuniv.nl harryw@cs.leidenuniv.nl Per Christian
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5.7.1 How can we do research First, we should make a trace of an existing program, which e.g. performs poorly with respect to our expectations. When this trace is in the right format (see section 3.5.4) and the simulator is not changed for a special new hierarchy, the trace can be loaded in the CVT. The
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shows, for which array the new base color can be chosen. Under this status bar an area is situated in which the ten colors are shown. In this area the user can click on the new color she wants to assign to the array as a base color. The chosen color is shown with a white square drawn around it (in the
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Chapter 1 Introduction This tool is a cache simulator especially developed in order to gain insight into unpredictable cache phenomena which cause a trementous performance slow down on high performance super- computers. Other previous simulators could only unveil bad performance by indicaters like
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Figure 3.45: The Extra Info on Traces. In figure 3.46 the program structure for a CVT-program is shown. What is clear from the figure is that a 'program' in CVT-terms is a perfectly nested loop nest, with the arrays used declared on the upper lines and (separated by an empty line) the loop nest itself.
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Figure 5.12: Final statistics of direct-mapped cache (1KB/256 cachelines) Figure 5.13: Final statistics of 2-way set-associative cache (1KB/256 cachelines) 0.236 when we increase the set associativity from direct-mapped to 4-way set associative cache, but when we increase to a 8-way set-associative
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(a) Miss statistics (b) Reference statistics Figure 4.12: Miss and reference statistics for Y, blocking factor is 8 (a) Miss statistics (b) Reference statistics Figure 4.13: Miss and reference statistics for Y, blocking factor is 16 shown in figure 4.15. Also, from the total miss ratio's (table 4.1), it
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3.3.3 Button ">>" Fast Forward Since the drawing on screen takes up quite a lot of time, the CVT is in full speed still too slow to go fast to a certain position in the program or trace, far (in number of references) from the current position. And since it is certain not unimaginable that a researcher
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Figure 3.40: The menu option Others. 3.9.1 Refresh screen Sometimes when the CVT fails to redraw the screen new when a window is closed, the user can select this menu option to refresh the screen and redraws the screen new. 3.9.2 Grid Mode The cache is divided in a large rectangular block, where each
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Factor determines how many times 50 instructions are executed in one 'run-loop', by default the value is 1. The definition 'DelayFactor' determines the amount of time between the execution of one instruction. Another important value is set by the definition 'MultiplyFactor' that is used to present the
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Chapter 6 Conclusions Because of high memory and network latencies, the cost of cache misses is very high. Because of the complexity of cache phenomena such as cache interferences, it is often difficult for programmers and hardware designers to precisely understand the causes and origins of this poor
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OpS6 deliverable APPARC ESPRIT Contract Compile time and run time analysis for managing shared virtual memory R.W. Ford A.P. Nisbet J.M. Bull Centre for Novel Computing Department of Computer Science The University of Manchester U.K. M. Hahad J. Erhel T. Priol IRISA-INRIA Campus de Beaulieu 35042 Rennes
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Figure 3.19: The file browser to load a program. 3.5.2 Sub-Option Show CVT code This function pops up a window and shows the CVT code in it. This function is automatically called when a new program is loaded. The close button will just make the window disappear. In the this window, a scrollable text
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Deliverable HwA5b: Multilevel Blocking and Prefetching for Linear Algebra Computations Responsibles (UPC): Elena Garcia Josep L. Larriba-Pey Jose R. Herrero Toni Juan Juan J. Navarro Tomas Lang Collaboration: University of Manchester and University of Versailles
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to rewind to look at the beginning of it in more detail. Suppose the interesting phenomenon occurred 350 references ago. By pressing the rewind button now, it could happen that the status was just saved before the user pressed the button and only 10 or 20 steps are rewinded, so the status of the CVT is
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ELSE CALL E.UPDATE(6) DO K = JP1 , L G = G +Z(K,J)*D(K) END DO END IF END DO F = 0.0D0 CALL E.UPDATE(7) DO J = 1,L F = F+ E(J)*D(J) END DO HH = F/(H+H) E(1:L)= E(1:L)-HH*D(1:L) DO J = 1,L F = D(J) G = E(J) CALL Z.UPDATE(3) CALL D.UPDATE(6) CALL Z.UPDATE(4) END DO 62 CALL D.UPDATE(7) END DO END IF DO I =
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Figure 3.36: The List of Breakpoints when a program is loaded. 3.8.1 Architecture Initially the architecture is set to a 2 KB cache-size, where each cache-line is four bytes large and the set associativity is direct-mapped (see picture 3.39) In the popped up window three numbers can be changed; cache
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(a) (b) (c) (d) Figure 8: No self-interference. (a) After 4 iterations of i; (b) Misses-per-array-reference statistics; (c) Array references fill pattern mapping; (d) CVT code. (a) (b) Figure 9: Self-interferences. (a) After 4 iterations of i; (b) Misses-per-array-reference statistics. beginfigure
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ArrayRef Statistics These statistics can be used with either programs or source-traces. The statistics show the number of misses/references/reuses per (unique) combination of (Statement ID, Array Reference ID). Since the buffer of array reference identifiers is defined as 512 large, there are only tow
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definition is chosen by pressing on the color the user wants. The chosen color is shown by drawing a white square around the color (in the figure, the third color on the bottom line is activated at this moment). The pressing of the OK button will make the CVT check the color definition, if it is
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) A A has logical number A has logical number 1 A has logical number 10 A has logical number 11 A has logical number 99 When we only want to see statistic of the first row of this matrix, we specify: Array-Name : A First Element: Last Element : 9 When we only want
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Ctadel: A Generator of Efficient Code for PDE-based Scientific Applications Robert van Engelen y & Lex Wolters y High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands frobert,llexxg@cs.LeidenUniv.nl Gerard Cats Royal
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3.6.1 Sub-Option Show/Change Array Colors One of the most powerful options of the CVT is the coloring aspect. As described in section 3.2.1, the cache lines are visualized by colored boxes. By defining separate colors for (a part of) an array, the behavior of that (part of the) array in cache is
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Figure 4.4: ArrayA and ArrayB completely present. DO J=2,9 DO I=1,41 XY = X(I,J,1) -X(I,J-1,1) YY = X(I,J,2) -X(I,J-1,2) PA = P(I+1,J) +P(I,J) QSP = (YY W(I+1,J,2) -XY W(I+1,J,3))/W(I+1,J,1) QSM = (YY W(I,J,2) -XY W(I,J,3))/W(I,J,1) FS(I,J,1) = QSP W(I+1,J,1) +QSM W(I,J,1) FS(I,J,2) = QSP W(I+1,J,2)
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APPARC PaA6a Deliverable ESPRIT BRA III Contract # 6634 PARASPAR: A Package for the Solution of Large and Sparse Systems of Linear Algebraic Equations, on Parallel Computers with Shared Memory Zahari Zlatev National Environment Research Institute Frederiksborgvej 399 DK-4000 Roskilde, Denmark
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in parallel with the simulation/visualization. Four types of statistics are displayed: cache, array, array reference, program counter (see Figure 4). In addition to global statistics (like cache miss ratio, array miss ratio: : : ), local statistics are provided: misses per cache line, misses per array
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With this theory, the dependence structure of a loop is are captured by a set of distance vectors. Then the localized vector space is computed from the distance vector set and the transformations matrix and it is used to capture the transformations potential to exploit locality. Furthermore, the
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Figure 3.8: Input array specification Figure 3.9: The buttons that control the tool. Top row (from left to right) : One Step, Run, Fast Forward, Rewind, Pause and Abort. Bottom row : Flush the cache, (coloring by) Array Ref ID or Array ID, Save As status file, Save status file, Load status file and
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This option has been added to the tool (first it was just the number of 2000 by default) because the saving of the complete status (as shown in figure 3.10) takes up quite a lot of time (i.e. in the way high performance computing looks at it. It is actually about 0.4 seconds, the user will only notice a
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Figure 3.44: The Extra Info on Programs. 3.10 Making the Input The input of the CVT consist out of two sources, programs and (memory) traces. The advantage of programs, which are executed by the CVT itself, is that the CVT is aware of what arrays are used and is consequently able to give statistics on
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Chapter 2 Cache Theory This chapter presents a general introduction to caches, it can be skipped by users already familiar with caches and their problems. In the rest of the report, the here discussed terms will be expected to be known to the readers. 2.1 Introduction to caches DOI=1,100 DOJ=1,10 A
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Cache Size architecture 1 KB 4 KB 16 KB 64 KB direct-mapped 0.690 0.321 0.220 0.208 2-way SA 0.710 0.293 0.206 0.206 4-way SA 0.798 0.236 0.207 0.206 8-way SA 0.798 0.253 0.211 0.206 Figure 5.7: Miss ratios with respect to cache size and set associativity. part of the conflict misses should be
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Figure 3.38: The menu option Parameters. Figure 3.39: The architecture specification 3.8.3 Allocate policy As discussed in the previous subsection, the allocate and write-policy are only essential on write misses. It is now essential in the manual performance evaluation, whether the requested data item
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the cache and timer breakpoint, two program specific kind of breakpoints, the loop value and statement breakpoint and the last kind is trace specific, the Program Counter breakpoint. 3.7.1 Sub-Option Add Cache Breakpoint Figure 3.30: The Add Cache Breakpoint window. The first kind of breakpoints is
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Appendix A CVT Programs A.1 CVT Code for FLO52 This section presents the CVT code for the FLO52 program as discussed in section 4.2. XY 0,1 YY 1 0,1 PA 2 0,1 QSP 3 0,1 QSM 4 0,1 X 5 1,194;1,34;1,4 P 26389 1,194;1,34 W 32985 1,194;1,34;1,4 FS 59390 1,194;1,34;1,4 DO J=2,9,1 DO I=1,41,1 (S1) R X 1*I,1*J,1
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APPARC PaA5a Deliverable ESPRIT BRA III Contract # 6634 Parallel Iterative Methods for Nonsymmetric Large-Scale Problems Achim Basermann Martin B ucker Peter Weidner Zentralinstitut f ur Angewandte Mathematik Research Centre J ulich GmbH (KFA) D-52425 J ulich, Germany A.Basermann@kfa-juelich.de
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HwA5a: Architectural Support for Sparse Matching Dr. David F. Snelling Department of Computer Science University of Manchester From the Technical Annex: One of the main problems in sparse direct methods is to match sparsity patterns. Within this project, results obtained from data-flow computing
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3.6.1 Sub-Option Show/Change Array Colors : : : : : : : : : : : : : : : : : : : : : : : : : : 29 3.6.2 Sub-Option Show/Change RefID Colors : : : : : : : : : : : : : : : : : : : : : : : : : : 32 3.6.3 Sub-Option Show PC Colors : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 33 3.6.4
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Chapter 4 Using the CVT for Software Optimizations This chapter will give an overview of the current cache issues and how software optimizations can address them. Another goal of this chapter is to show the user what benefits the CVT can bring in understanding (by visualization) the exact cache behavior
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Figure 3.42: The Message/Information window. In this section the messages option is described, with this option the messages that the CVT sends to the user (e.g. a message from the Tool after just setting the Messages On is shown in figure 3.42) can be set On (the messages will be sent) or Off (the
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between cache line 114 and cache line 118. In order to locate the trace section where this hot spot phenomenon occurs, the program is run with fast forward to move quickly through the trace. It appears that this phenomenon occurs between the 3700th and the 4400th reference. When looking at Array
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(a) Miss statistics (b) Reference statistics Figure 4.19: Miss and reference statistics for array A in the SOR loop. improve the data locality of a loop nest. That the resulting loop nests are quite difficult to fathom, is shown in the next few paragraphs with a loop that performs SOR. In figure 4.17,
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3 Applications For all the example applications presented below, the following cache parameters are used: cache size = 8192 bytes, line size = 32 bytes, the cache is direct-mapped. These parameters correspond to the Dec Alpha 21064 on-chip data cache . 3.1 Performance Evaluation and Software
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increases, the number of conflict misses decreases. This is explained by the opportunity to place two or more data-items, which map to the same cache location, in cache at the same time without bumping out reusable data. When the size increases, the number of capacity misses is decreasing. This can be
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intrinsic misses and account for a small share of the total cache misses (since usually the matrix dimension is much smaller than the number of non-zero elements). The main source of misses comes from arrays Matrix and Index, which have no temporal locality and exhibit flawless spatial locality. These
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DO kk = 1,N,B DO jj = 1,N,B DO i = 1,N,1 DO k = kk,min(kk+B-1,N),1 r = X; DO j = jj,min(jj+B-1,N),1 Z + = r * Y; ENDDO ENDDO ENDDO ENDDO ENDDO Figure 3.48: The fortran code that performs matrix-matrix multiply, for matrices of size N*N and block-size B. 3.11 Further Tuning This section
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This button provides the user a way to save the state of the CVT at any given moment. All the needed structures are saved to let the user start from that point on at any given time (look at section 3.3.11 for loading a certain status). When the user presses this button, a window is popped up in which
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Chapter 3 CVT Description This chapter will describe the CVT by first going through the global structure of the Cache Visualization Tool, then all the options the CVT provides are discussed by going through the menu-options and the realtime possibilities. The last part of this chapter describes how to
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Figure 4.8: All arrays colored black except array W Figure 4.9: All arrays colored black except array X to apply loop transformations such as interchange, skewing and reversal to produce a set of loops that are both able to be blocked and advantageous to be blocked. In section 4.4.3 an algorithm that
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Figure 5.9: Statistics of references to ArrayA Array AArray BArray CArray D 1000816425601617225602560816100164172256432123# arrays Figure 5.10: Address range in cachelines of 1 KB cache When we simulate the program 5.8 on a 1 KB direct-mapped cache there is a lot of cross-interference between 4 arrays
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Figure 3.43: The Message/Error window. additional color. In figure 3.43 a window is shown in which the interpreter (the program loader) sends the message that there was an error at line 1 (the CVT was tried to be fed with an executable file and it does not like that). 3.9.5 Sub-Option Extra Info The
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CVT. In the other window the statistics are displayed, together with buttons for easy switching between the several statistics. The statistics window is shown in figure 3.2. 3.2.1 The Cache Area The cache is formally visualized by a large array with consecutive cache-lines. Large bars are hard to
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Contents 1 Introduction 4 2 Cache Theory 6 2.1 Introduction to caches : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 6 2.2 Set Associativity : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 7 2.3 Cache line identification : : : : : :
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(S23) R QSM (S24) R W 1*I,1*J,1 (S25) W FS 1*I,1*J,1 (S26) R QSP (S27) R W 1*I+1,1*J,2 (S28) R QSM (S29) R W 1*I,1*J,2 (S30) R YY (S31) R PA (S32) W FS 1*I,1*J,2 (S33) R QSP (S34) R W 1*I+1,1*J,3 (S35) R QSM (S36) R W 1*I,1*J,3 (S37) R XY (S38) R PA (S39) W FS 1*I,1*J,3 (S40) R W 1*I+1,1*J,4 (S41) R P
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(a) Miss statistics (b) Reference statistics Figure 4.14: Miss and reference statistics for Y, blocking factor is 12 Figure 4.15: After finishing blocked matrix-matrix multiply, blocking factor is 12. 4.4.1 Some theory When a loop transformation is applied to some kind of loop nest, it is obvious that
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3.14. 3.4.1 Sub-Option About Tool This option shows information on the authors of the tool in a window in the middle of the screen. It is in here to let the users be able to contact the authors or the advisors for specific questions on the CVT and to send them remarks that could enhance the CVT for
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CoD5a OPTIMIZING LOCALITY OF PROGRAMS APPARC DELIVERABLE F. Bodin, L. Kervella University of Rennes M. O'Boyle University of Manchester Contents 1 A Compiler Strategy for Shared Virtual Memories 3 1.1 A Compiler Strategy for SVM : : : : : : : : : : : : : : : : : : : : : : : : : : 5 1.2 Global
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5.8.1 Cache size and Set associativity : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 77 5.8.2 Cacheline size and Set Associativity : : : : : : : : : : : : : : : : : : : : : : : : : : : : 80 6 Conclusions 82 A CVT Programs 84 A.1 CVT Code for FLO52 : : : : : : : : : : : : : : : : : : : :
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Statement Kind Statement ID Array Reference ID Array Name c1*Index Name1+c2*Index Name2+....+cN*Index NameN+cN+1, d1*Index Name1+d2*Index Name2+....+dN*Index NameN+dN+1, .... p times if Array 'Array Name' .... has p dimensions e1*Index Name1+e2*Index Name2+....+eN*Index NameN+eN+1 - "Array Name" is a
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(a) (b) (c) Figure 7: Interference on group-temporal reuse. (a) After 10 iterations of j; (b) After 8 iterations of i; (c) Reuse-per-array-reference statistics. 15
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AMAT-1way = 20 ns + 0.039 * 200ns = 27.8ns AMAT-2way = 20 ns * 1.085 + 0.030 * 200ns = 27.7ns Figure 5.3: Calculation average memory access time CPUtime-1way = IC*(1.5*20ns+1.3*0.039*200)=40.1*IC CPUtime-2way = IC*(1.5*20ns*1.085+1.3*0.030*200)=40.4*IC Figure 5.4: Calculation cpu-performance. 5.4 Caches
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ffl cache.c The main file of the CVT, it sets up the global variables and installs all the other routines, it is only 9641 bytes large. ffl callback.c In Motif all mouse clicks are handled with call-backs, this file contains the functions that are called (though there are call-back functions in other
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code and the loop nest that is used to feed the CVT are shown (the CVT loop format and how to rewrite normal code to CVT code is explained in section 3.10.1). Figure 4.2: ArrayA and ArrayB are conflicting. For the experiments in this chapter, a direct-mapped cache of 8 Kb and a cache line size of one
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DO i=0,99 DO j=0,99 X(j,i) = X(j,i+1) + Y(j,i) ENDDO ENDDO Figure 2: Fortran loop nest and CVT equivalent. do 10 j = 2,jl do 10 i = 1,il call trace(9,0,x(i,j - 1,1),1,x(1,1,1),7) call trace(9,1,x(i,j,1),1,x(1,1,1),7) xy = x(i,j,1) - x(i,j - 1,1) call trace(10,0,x(i,j - 1,2),1,x(1,1,1),7) call
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A.3 CVT code for SOR This section presents the CVT code for both the original SOR loop nest and the blocked SOR loop nest. The original nest is, when N, t and B are substituted by 1000, 20 and 10 respectively : A 0,1002 DO I=0,20,1 DO J=0,1000,1 R A 1*J R A 1*J+1 R A 1*J+2 W A 1*J+1 ENDDO ENDDO After
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Since we want to write loop transformations as a matrix multiplication, especially a matrix multiplication with unimodular matrices, for benefits mentioned later on, some background on unimodular matrices is presented. A unimodular matrix is a square integer matrix U, where det(U)= 1. The benefit of
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Array Name1 Base-Addres Lower-Bound,Upper-Bound;............;Lower-Bound,Upper-Bound .... p dimensions Array NameK Base-Address Lower-Bound,Upper-Bound;............;Lower-Bound,Upper-Bound <<<< Empty line >>>> DO Index Name1 Begin Value,End Value Stride Statement 1 ....N loops Statement K DO Index NameN
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DO i = 1,100,1 DO j = 1,50,1 Y = Y + A B ENDDO ENDDO Dependence vector (0,1) Algorithm, find the most suitable (u11; u21) : Step 1) Initialize LIST to all possibilities for the first row of U : LIST = (0; 1)T ; (1; 0)T ; (0; 1)T ; (1; 1)T Step 2) Delete all possibilities from the LIST
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be observed because of self-interference misses. Let us consider the blocked version of matrix-matrix multiply (see below). We will here consider the effect of varying the matrix dimension; B = 30. DO 1 kk=0,N-1,B DO 1 jj=0,N-1,B DO 1 i=0,N-1 DO 1 k=kk,min(kk+B-1,N-1) reg = X(k,i) DO 1
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thesis) the total number of pages. There is a 'Prev' and 'Next' button provided that jumps to the previous and next page of colors respectively. In the area under the status bar, the actual program counters are shown as 'PC xxxx', where xxxx is the value of the program counter, with behind it a
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Figure 4: Statistics window. Figure 5: Zoomed statistics. (a) (b) (c) (d) (e) Figure 6: No cross-interference. (a) After 10 iterations of j; (b) After 8 iterations of i; (c) Reuseper-array-reference statistics; (d) Array references fill pattern mapping; (e) CVT code. 14
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APPARC Deliverable CoD6 Compiling Data Parallel Languages for Shared Virtual Memory Systems R. Berrendorf, M. Gerndt Research Centre J ulich (KFA) Central Institute for Applied Mathematics 52425 J ulich Germany June 21, 1995
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Chapter 5 Using the CVT for Hardware Optimizations 5.1 Introduction Most program do not access all code or data. There is a small percentage of code which is executed intensively, e.g. a numerical code where nested DO-loops execute a multiplication of two matrices. This hypothesis of usage a portion of
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3.11.2 Using and changing CVT's data structures and variables For the users convenience there are several data structure and variables that can be used (especially in the visitors cache) and there are other that can be changed (like the number of trace lines the CVT loads in, at a time). This section
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means that a load performed by the special prefetch instruction will load the data into cache, not causing a compulsory miss, whatsoever. There are two important notes to make here : ffl The simulator of the CVT has to change in such a way that, whenever a special prefetch instruction loads in data, a
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Figure 3.37: The List of Breakpoints when a trace is loaded. On the screen all the cache-lines in the same set are bound together in a red box. When the cache is directmapped, all cache-lines belong to one set and thus there is one red box drawn around the whole cache. There are two red boxes drawn if
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IRISA/INRIA. 1992. KOAN/Fortran-S Reports. Campus de Beaulieu, Rennes, France. LEWIS, T. G., AND EL-REWINI, H. 1992. Introduction to Parallel Computing. Prentice-Hall International Inc. LI, K., AND SCHAEFER, R. 1989. A Hypercube Shared Virtual Memory System. Proceedings International Conference on
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ffl Left Button The left mouse button is used to (un)select colors. This is only applicable to additional colors, with this function an additional color can be unselected when not needed at a certain moment, but will be used a while later (this is to prevent deleting and later on again defining the same
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ffl Degree of interfernence w = WB Cs , where WB is the bandwidth and Cs the cache-size. This parameter indicates how many elements of X conflict for the same cache line, and therefor reflects quite well the degree of self-interference. ffl Density d = nnz WB , where nnz is the average number of
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Finally, the CVT can be used to gather information on the locality properties of C-codes, to which little research has been devoted. The frequent use of pointers induces weird reference patterns that cannot or are difficult to analyze from the source code. 4.2 Cache Interferences This section will
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A p p a r c P r o j e c t R e p o r t , D e l i v e r a b l e P S E 6 b : P r o b l e m S o l v i n g E n v i r o n m e n t a n d D e m o n s t r a t o r o f G r a p h i c a l U s e r I n t e r f a c e s a n d a V e r y H i g h L e v e l L a n g u a g e T . S . P a p a t h e o d o r o u , M . D . K o u
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are necessary, closely looking at a non-numerical code cache behavior can bring numerous intuitions on the locality characteristics of these codes. Let us illustrate the contribution that cache visualization can bring. We obtained a 100000- entry trace by running the Unix command compress with the Spa
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The Cache Visualization Tool (CVT) E. van der Deijl O. Temam Leiden University Versailles University The Netherlands France E. Granston G. Kanbier Rice University Leiden University Texas The Netherlands August 21, 1995
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Figure 3.13: The speed scale and status bar On the bottom of the screen in the right hand corner, a speed bar is situated for control of the speed of the simulation done by the CVT. The speed bar can be controlled by the user at any point in time (except when going fast forward) and can be set to any
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Figure 3.31: The Set Timer Breakpoint window. When the CVT is running it will check the internal timer against the timer breakpoint (if it is set), if the two match, the CVT will be halted and a message will be sent to the user to indicate that the timer breakpoint has halted the CVT. 3.7.3 Sub-Option
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type any piece of Fortran/C program can be traced. There is no limitation on the trace size, but visualization slows down simulation so only reasonable size traces can be considered. The main asset of source traces is to allow nearly any piece of Fortran code to be traced while still forwarding to the
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(a) (b) (c) (d) (e) Figure 10: Analysis of loop nests with multiple references. (a) Distribution of misses over the cache; (b)&(c) Misses-per-array-reference before & after the hot spot phenomenon; (d)&(e) Cache content for two consecutive uses of cache line 116. 17
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Figure 3.33: The Add Loop-value Breakpoint window. Figure 3.34: The Add Statement Breakpoint window. user wants to add a statement breakpoint, a window as shown in figure 3.34 is put on screen, in which the user can enter the statement ID of the to be break-pointed statement. The array reference ID can
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good performance. But this indicator is independent of the speed of hardware. For an extreme example, suppose we would test a hierarchy with only one level; memory. There will not be any misses and perform very well compared to a hierarchy with two levels, where a few misses occur, but exploit the
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for more information on the PDC) and numerous other uses of the extra entries can be thought of. 3.5.5 Sub-Option Load Source-Trace To benefit from both the advantages of Programs and those of Traces, a third kind of input was thought of. This third kind of input is called a source-trace, which is a
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this seems a perfect policy to bump out least recently used cachelines. But imagine the following reference pattern in a 2-way set associative cache: First there is a read to datum A followed by a read to datum B, mapping to the same location in cache. Data A and B can be placed in the selected set. Now
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Main MemoryCacheCPU Figure 2.2: A memory hierarchy : every byte found on one level is present in all levels below. There are four important issues associated with caches, cache line placement (discussed in section 2.2), cache line identification (discussed in section 2.3), cache line replacement
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Colors/Fill Patterns For loop nests and source traces, there are two main display modes: coloring by array or coloring by array reference. When coloring by array, two cache lines containing data from the same array but brought by distinct array references would have the same color. When coloring by
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Figure 3.20: The program area filled with a program that performs blocked matrix-matrix multiply. 3.5.4 Sub-Option Load Trace Due to the restrictions set for the kind of programs the CVT is able to interpret (for more information see section 3.10.1), the CVT is not able to visualize the cache behavior
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DO i=1,N,1 DO k=1,N,1 r = X; DO j=1,N,1 Z += r Y; ENDDO ENDDO ENDDO Figure 4.10: Matrix matrix multiplication for matrices of size N * N DO kk=1,N,B DO jj=1,N,B DO i=1,N,1 DO k=kk,min(kk+B-1,N),1 r = X; DO j=jj,min(jj+B-1,N),1 Z += r Y; ENDDO ENDDO ENDDO ENDDO ENDDO Figure
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can not begin until the tag is checked to see if it is a hit. Because this tag checking can not occur in parallel, writes usually take up more time than reads. There are two basic policies when writing to cache, which are also implemented in the CVT : ffl Write through The information is written to both
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The completion procedure, i.e. given the first few rows of a loop transformation, 'pad out' the remaining rows to generate a matrix that represents a legal transformation (look at 4.4.1, for the definition of a legal transformation), is also easier. This is because in a nonsingular matrix, fewer
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are. 3.4.5 Sub-Option Quit Well, there is a time to come and a time to go, an old Dutch saying goes. When this option is chosen, the time to go for the CVT has come. This is final unless the user answers 'No' to the question 'Really quit', then the CVT is allowed to stay somewhat longer, 'Yes' makes the
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user how to use the tool in order to detect cache phenomena. Chapter five will test a few known hardware optimazations and compare several hardware hierarchies. Finally chapter six will give our conclusions about this subject. 5
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Figure 3.5: The statistics in zoomed in mode. misses/references/reuses and the global miss ratio (of for array statistics, the miss ratio for that array) are shown on the right hand of the drawing area. There are two general modes, the statistics can be in, this is 'Percentage' and 'Amount'. The
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from all these phenomenon. But one thing must be clear now; The CVT can give you insight in the influence of several parameters on the performance. Although this report has described the CVT as an effective tool to analyze and further optimize current software and hardware optimizations,the CVT in this
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transferred. Thus, in the performance evaluation it is very important not to focus on the miss-ratio! Besides the unpredictable behavior of the set associativity, the effect of increasing the cache size is almost always translated in a better miss-ratio. Increasing the cacheline size will also cause a
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APPARC Deliverable HwA6 Manchester: D. F. Snelling (snelling@cs.man.ac.uk) Versailles: O. Teman (Olivier.Temam@prism.uvsq.fr) Orsay: N.Drach Contents 1 Software Assistance for Data Caches 5 1.1 Introduction : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 5 1.2 A Cache Design for
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Dynamic Cache Splitting Toni Juan, Dolors Royo and Juan J. Navarro Universitat Polit ecnica de Catalunya (UPC)
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A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality Antonio Gonz lez, Carlos Aliagas and Mateo Valero Universitat Polit cnica de Catalunya Departamento de Arquitectura de Computadores Campus Nord - M dulo D6 c/ Gran Capit n, s/n E-08071 - Barcelona (Spain) E-mail:
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Triangular Heaps Henk J.M. Goeman Walter A. Kosters Department of Mathematics and Computer Science, Leiden University, P.O. Box 9512, 2300 RA Leiden, The Netherlands Email: fgoeman,kostersg@wi.LeidenUniv.nl
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SEIS Software Engineering Informatiesystemen en Rijks Universiteit Leiden SEIS Software Engineering en Informatiesystemen Copyright Rijksuniversiteit Leiden, 1995 Laatste wijziging: 15 november 1995 De meest recente versie van dit document is beschikbaar met ftp:
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APPARC PCA5 Parallelizing Distinct Element Simulations R. Knecht and G.A. Kohring Central Institute for Applied Mathematics Research Center J ulich (KFA) D-52425 J ulich, Germany
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Performance of Multi-Parent Crossover Operators on Numerical Function Optimization Problems A.E. Eiben gusz@wi.leidenuniv.nl Leiden University Dept. of Computer Science P.O. Box 9512 2300 RA Leiden The Netherlands C.H.M. van Kemenade kemenade@cwi.nl CWI Dept. of Software Technology P.O. Box 94079 1090
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Functional Programming in a Basic Database Course (FPLE'95) 1 Functional Programming in a Basic Database Course1 Pieter Koopman, Vincent Zweije Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA, Leiden, The Netherlands email: pieter@wi.leidenuniv.nl
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Context-Free Graph Grammars and Concatenation of Graphs Joost Engelfriet and Jan Joris Vereijken Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands e-mail: engelfri@wi.leidenuniv.nl
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MASTER S THESIS OF Arjen Bos (9204318) SUPERVISED BY Ida Sprinkhuizen-Kuyper Henk Goeman COVER: THE WORLD IN ONE GAME - i - CONTENTS Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Introduction . . . . . . . . . . . . . . . . .
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1 The Error Surface of the 2-2-1 XOR Network: The finite stationary Points Ida G. Sprinkhuizen-Kuyper Egbert J.W. Boers
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Graph Rewrite Systems and Visual Database Languages Marc Andries ii Graph Rewrite Systems and Visual Database Languages Proefschrift ter verkrijging van de graad van Doctor aan de Rijksuniversiteit te Leiden, op gezag van de Rector Magnificus Dr. L. Leertouwer, hoogleraar in de faculteit der
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Regular Description of Context-Free Graph Languages Joost Engelfriet and Vincent van Oostrom Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands email: engelfri@wi.leidenuniv.nl
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Internal Report 94-41 August 1994 Rijksuniversiteit te Leiden Vakgroep Informatica Local Structure Optimization M.V. Borst Department of Computer Science Leiden University P.O. Box 9512 2300 RA Leiden The Netherlands GAiN SEIS in Evolutionary Generated Neural Network Architectures MASTER S THESIS Local
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PARSING VISUAL LANGUAGES WITH LAYERED GRAPH GRAMMARS 1 Defining and Parsing Visual Languages with Layered Graph Grammars1 J. REKERS* AND A. SCH URRy *Department of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, The Netherlands, rekers@wi.leidenuniv.nl, and yLehrstuhl f ur
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Acyclicity of Switching Classes Jurriaan Hage Dept. of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands, e-mail: jhage@wi.leidenuniv.nl home-page: http://www.wi.leidenuniv.nl/~jhage Tero Harju Dept. of Mathematics, University of Turku FIN-20500 Turku, Finland e-mail:
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1 Optimization of the discriminatory power of a trigram based document clustering algorithm using evolutionary computation by Daniel Tauritz Last revised April 30th, 1996 2 Index Paragraph 1 - Introduction ........................................................................ 3 Paragraph 2 - A trigram
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NATO UNCLASSIFIED BY M.W. Mak March 1996 NATO UNCLASSIFIED 2
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Towards a Compositional Method for Coordinating Gamma Programs Michel Chaudron May 24, 1996
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Generalized Context-Free Grammars Nik e van Vugt May 24, 1996
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page 1 EVOLUTIONARY CHANGE the evolution of change management by Jeroen van der Zon University of Leiden, Department of Computer Science April 24, 1996 page 2 page 3
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Approximating Bayesian Belief Networks by Arc Removal Robert A. van Engelen Dept. of Computer Science, Leiden University, P.O. Box 9512, 2300 RA Leiden, The Netherlands e-mail: robert@cs.leidenuniv.nl
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1 Classification of all Stationary Points on a Neural Network Error Surface I.G. Sprinkhuizen-Kuyper and E.J.W. Boers Department of Computer Science Leiden University email: {kuyper,boers}@wi.leidenuniv.nl
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1 The Error Surface of the 2-2-1 XOR Network: Stationary Points with infinite Weights Ida G. Sprinkhuizen-Kuyper Egbert J.W. Boers
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1 The Error Surface of the simplest XOR Network has no local Minima I.G. Sprinkhuizen-Kuyper and E.J.W. Boers Department of Computer Science Leiden University email: {kuyper,boers}@wi.leidenuniv.nl
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Limited Area Numerical Weather Forecasting on a Massively Parallel Computer Lex Wolters High Performance Computing Division, Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands llexx@cs.leidenuniv.nl Gerard Cats Royal Netherlands Meteorological Institute P.O.
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A Comparison of Parallel Programming Paradigms and Data Distributions for a Limited Area Numerical Weather Forecast Routine Robert van Engelen & Lex Woltersy High Performance Computing Division Department of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, the Netherlands
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The Size of 2-Classes in Group Labeled 2-Structures Jurriaan Hage Dept. of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands, e-mail: jhage@wi.leidenuniv.nl home-page: http://www.wi.leidenuniv.nl/~jhage Tero Harju Dept. of Mathematics, University of Turku FIN-20500
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Compiler Support for Sparse Matrix Computations PROEFSCHRIFT TER VERKRIJGING VAN DE GRAAD VAN DOCTOR AAN DE RIJKSUNIVERSITEIT TE LEIDEN, OP GEZAG VAN DE RECTOR MAGNIFICUS DR. L. LEERTOUWER, HOOGLERAAR IN DE FACULTEIT DER GODGELEERDHEID, VOLGENS BESLUIT VAN HET COLLEGE VAN DEKANEN TE VERDEDIGEN OP
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Logical Description of Context-Free Graph Languages Joost Engelfriet and Vincent van Oostrom Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands email: engelfri@wi.leidenuniv.nl
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Page 1 Concepts of Adaptive Information Filtering by Daniel Tauritz Last revised July 11th, 1996 Page 2 Index Preface .......................................................................................................... 2 Chapter 1 - Introduction
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1 Het 2-3-1 XOR-Netwerk heeft lokale Minima Ida G. Sprinkhuizen-Kuyper Egbert J.W. Boers Vakgroep Informatica RijksUniversiteit Leiden Postbus 9512 2300 RA Leiden {kuyper,boers}@wi.leidenuniv.nl Samenvatting In dit artikel wordt een lokaal (niet absoluut) minimum gegeven voor een eenlagig netwerk met
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Viability of a Parsing Algorithm for Context-sensitive Graph Grammars Jeroen T. Vermeulen August 26, 1996
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Evaluating and Improving Steady State Evolutionary Algorithms on Constraint Satisfaction Problems Koen van der Hauw 9 August 1996
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A Content-based Image Search Engine in Cyberspace a Master's Thesis Application-Oriented Computer Science Leiden Imaging and Multimedia Group Department of Computer Science Leiden University Yuri Lausberg August 19, 1996 Preface This thesis represents the final part of my computer science studies here
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Attribute Grammars and Monadic Second Order Logic Roderick Bloem October 15, 1996
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Two Categories of Relations (Technical Report no. 94-32) Peter Knijnenburg Frank Nordemann Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands. E-mail: peterk@cs.leidenuniv.nl 1 Introduction Recently there have appeared two notions of `categories of relations'
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A Complete Order-theoretic Model for the Algebra of Communicating Processes Peter M.W. Knijnenburg Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands. E-mail: peterk@cs.leidenuniv.nl
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On the Validity Problem for Unimodular Transformations Peter M.W. Knijnenburg High Performance Computing Division, Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands. peterk@cs.leidenuniv.nl
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Towards Unimodular Transformations for Non-perfectly Nested Loops Peter M.W. Knijnenburg High Performance Computing Division, Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands. E-mail: peterk@cs.leidenuniv.nl
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Multi-transformations: Code Generation and Validity Peter M.W. Knijnenburg High Performance Computing Division, Dept. of Computer Science, Leiden University, Niels Bohrweg 1, 2333 CA Leiden, the Netherlands e-mail: peterk@cs.leidenuniv.nl Eduard Ayguad e and Jordi Torres Departament d'Arquitectura de
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A Vector Transformation Library Edwin van Dis Remco D. de Vreugd Alex P. Wulms Peter Brinkhaus Peter M.W. Knijnenburg High Performance Computing Division Dept. of Computer Science, Leiden University Niels Bohrweg 1, 2333 CA Leiden, the Netherlands October 1995
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Object-oriented specification of coordinated collaboration G. Engels a, L.P.J. Groenewegen a, and G. Kappel b aDept. of Computer Science, Leiden University, P.O. Box 9512, NL-2300 RA Leiden, The Netherlands, fengelsjluukg@wi.leidenuniv.nl bDept. of Computer Science, University of Linz, Altenbergerstr.
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Towards Measurable Process Models Tineke de Bunje1, Gregor Engels2, Luuk Groenewegen2, Michael Heus2, Aart Matsinger1 1 Philips Research Laboratories, Prof. Holstlaan 4, NL-5656 AA Eindhoven 2 Leiden University, Dept. of Computer Science, P.O. Box 9512, NL-2300 RA Leiden 1 Motivation and Background Due
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Coordination by Behavioural Views and Communication Patterns Luuk Groenewegen and Gregor Engels Leiden University, Department of Computer Science P.O. Box 9512, NL-2300 RA Leiden, The Netherlands email: luuk,engels@wi.leidenuniv.nl 1 Introduction In a proposal for a new specification formalism was
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A Cantor-Bernstein Result for Structured Objects Joost Engelfriet Tjalling Gelsema Department of Computer Science, Leiden University, P.O.Box 9512, 2300 RA Leiden, Netherlands email: engelfri@wi.leidenuniv.nl gelsema@wi.leidenuniv.nl
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Adaptive Information Filtering as a means to overcome Information Overload Daniel Tauritz M.Sc. thesis Department of Computer Science Leiden University, The Netherlands Last revised September 11th, 1996
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Go and Genetic Programming Playing Go with Filter Functions S.F. da Silva November 21, 1996 1 Contents 1 Introduction 4 2 Go and genetic programming 4 3 Description of the go board evaluation function 4 4 Fitness 6 4.1 Criteria for fitness : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : :
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Generalizations of Mazurkiewicz traces This Master's Thesis represents the final part of my computer science study in Leiden. I would like to thank my supervisor Jetty Kleijn for her support. Contents
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1 Probabilities and entropy of some small neural networks for boolean functions Ida G. Sprinkhuizen-Kuyper and Egbert J. W. Boers Department of Computer Science Leiden University {kuyper,boers}@wi.leidenuniv.nl
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Notions of Refinement for a Coordination Language for Gamma Michel Chaudron Department of Informatics Leiden University, The Netherlands chaudron@cs.leidenuniv.nl Revised: February 14, 1997
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Master's Thesis Adaptive Genetic Algorithms with Multiple Subpopulations and Multiple Parents B.A. Thijssen March 12, 1997 CONTENTS 2 Contents 1 Introduction 3 2 A genetic algorithm 3 2.1 Crossovers with multiple children : : : : : : : : : : : : : : : : 5 2.1.1 N-Point Crossover : : : : : : : : : : : :
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This is page 1 Printer: Opaque this How to represent a visual specification Marc Andries Gregor Engels Jan Rekers
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Aggregaties en dynamische modellen Bas Kruiswijk Afstudeerscriptie Rijksuniversiteit Leiden Vakgroep Informatica Mei 1997 Begeleider: Prof. Dr. G. Engels Aggregaties en dynamische modellen Inhoudsopgave Pagina i 1 Inleiding 1 1.1 Aanpak 1 2 Classificatie 2 2.1 Inleiding 2 2.1.1 Algemeen 2 2.1.2
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Molecular Computation and Splicing Systems J.H.M. Dassen1 August 30, 1996 1Author's current address: Department of Computer Science, Leiden University, P.O. Box 9512, 2300 RA Leiden, The Netherlands; jdassen@wi.LeidenUniv.nl. 2
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1 Gregor Engels (Leiden University) Gregor Engels Leiden University, The Netherlands Promoter2 Summer School 97 Object-oriented Modelling Approaches Luuk Groenewegen, Pieter Koopman, Ray Dassen, Pieter Jan t Hoen University of Paderborn, Germany engels@wi.leidenuniv.nl engels@uni-paderborn.de 2 Gregor
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Dimension reduction of images using neural networks Master thesis J.A. Spierenburg July 1997 Supervisors: Prof. Dr. J.N. Kok Leiden University Department of Computer Science Dr. D.P. Huijsmans Leiden University Department of Computer Science
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Prediction of the Water Level During Storm Situations using Neural Networks M.C. van de Weg Department of Computer Science Leiden University Postbus 9512 2300 RA Leiden The Netherlands mvdweg@wi.LeidenUniv.NL Fax: 31-715276985 Phone: 31-71527101
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Characterization of Properties and Relations defined in Monadic Second Order Logic on the Nodes of Trees Roderick Bloem and Joost Engelfriet Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands e-mail: engelfri@wi.leidenuniv.nl
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Stock Price Prediction using Neural Networks Master Thesis Leiden University F.W. Op 't Landt 4th August 1997 Contents 1 Introduction 5 1.1 Description of the project : : : : : : : : : : : : : : : : : : : : : : 5 1.2 Overview : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 6 2 Neural
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The Size of Switching Classes with Skew Gains Jurriaan Hage Dept. of Computer Science, Leiden University P.O. Box 9512, 2300 RA Leiden, The Netherlands, e-mail: jhage@wi.leidenuniv.nl home-page: http://www.wi.leidenuniv.nl/~jhage Tero Harju Dept. of Mathematics, University of Turku FIN-20014 Turku,
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Blackboard Systems in SOCCA Process Evolution visualised by Reproductive, communicating Blackboard Systems Carla Spruit Augustus 1997 MASTER S THESIS Department of Computer Science Leiden University P.O.Box 9512 2300 RA Leiden The Netherlands 28/8/97 Blackboard Systems in SOCCA 2
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Derivation Trees of Ground Term Rewriting Systems Joost Engelfriet Department of Computer Science, Leiden University P.O.Box 9512, 2300 RA Leiden, The Netherlands e-mail: engelfri@wi.leidenuniv.nl
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Definition of an Encapsulated Hierarchical Graph Data Model Static Aspects, Part 1 G. Busatto G. Engels Leiden University, Dept. of Computer Science Niels Bohrweg I P.O. Box 9512 2300 RA Leiden, The Netherlands fbusatto,engelsg@wi.leidenuniv.nl
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Competing Crossovers in an Adaptive GA Framework A.E. Eiben, I.G. Sprinkhuizen-Kuyper, B.A. Thijssen Department of Computer Science Leiden University fgusz,kuyperg@wi.leidenuniv.nl
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1 Blackboard Systems modelled in SOCCA Carla M.C. Spruit, Luuk P.J. Groenewegen and Ida G. Sprinkhuizen-Kuyper Department of Computer Science Leiden University {luuk,kuyper}@wi.leidenuniv.nl Abstract The goal of this paper is two-fold. First of all, a general Blackboard System is specified in terms of