A PRACTICAL APPROACH TO FAULT

LOCALIZATION IN CRYSTAL OSCILLATORS

Marina Santo - Zarnik

Iskra RRI IEZE, Stegne 27, 61000 Ljubljana

Franc Novak, Sre?ko Ma?ek

Jo?ef Stefan Institute

Jamova 39, 61111 Ljubljana, Slovenia

phone: +386 61 1773 900

fax: +386 61 219 385

email: [email protected]

Abstract

This paper reports on practical experience in non-destructive fault localization in crystal oscillators implemented in SMD technology. An approach to a fast veriocation of the operation of a crystal in a given oscillator circuit for the specioed temperature range is described. It complements our earlier work on fault localization in oscillator circuits designed for testability by MOS switches. Experimental results in fault localization of a prototype series of the oscillator circuits are presented to illustrate the approach.

1 Introduction

Detection and localization of faulty components are important issues in the production of electronic products. Because the costs of testing and diagnosing can be rather high and may even exceed the design costs of the product it is important to keep them within reasonable

This work has been reported at the IEEE European Test Workshop, Montpellier, France, June 12-14, 1996; Proceedings pp. 89-93.

bounds. Design for testability (DFT) techniques are often employed in order to increase the controllability, observability and predictability of the designed circuit or system.

DFT in digital domain is a mature research area with established general guidelines and well-known practical solutions [4], [5], [3], some of them even standardized, like for example IEEE standards 1149.1 and 1149.5.

On the other hand, analog DFT is still emerging, and as noticed in [2], the general problem of DFT for analog circuits is almost certainly intractable. Hence it is more realistic to expect partial solutions suitable for specioc classes of circuits.

In our earlier paper [6] we have presented a feasibility study of DFT of a voltage controlled temperature compensated crystal oscillator (VCTCXO) with built-in MOS switches to increase its controllability and observability. We have shown in the case of a 16.384 MHz Pierce crystal oscillator that the impact of DFT switches can be compensated so that the circuit operates within the specioed tolerances. Inserted DFT switches provided for fast and simple procedure of isolation of faulty passive components of the circuit. The remaining